clock system
英 [klɒk ˈsɪstəm]
美 [klɑːk ˈsɪstəm]
时钟（同步）脉冲系统；钟面指示弹着法
双语例句
- The effects of multiplicative noise on additive noise-induced internal signal stochastic resonance ( ISR) are studied in a Neurospora circadian clock system driven by external signal or not.
利用有和无外信号作用的脉孢菌生物钟体系，研究了与加性噪音相关或不相关的乘性噪音对加性噪音诱导出的内信号随机共振的影响作用。 - In this paper, multi-function digital clock system design.
本文介绍了多功能数字钟的系统设计。 - Calendar and Clock System Control by Single-Chip Microcomputer
由单片机控制的日历时钟系统 - Then, it carefully analyzes the structure, the grammar, the semantic meaning of MPEG-2 transport stream system layer and the decoder clock system.
首先，本文简单介绍了数字电视和MPEG-2标准及编解码原理。然后，详细介绍了MPEG-2系统层传输流（TS）的码流结构、语法和语义以及解码器时间系统。 - Synchronize the clock system through the Global Position System ( GPS) in subway is studied, the principle of time synchronization according to the theory of GPS is introduced, and a GPS synchronizing instrument using in Beijing subway is also dealt with.
利用全球定位系统（GPS）同步地铁时钟系统，介绍了用GPS进行时间同步的原理，并结合北京地铁的实际应用介绍了GPS同步仪的设计及应用。 - The development of building tower clock system
建筑塔钟系统研制 - Clock System Design in Monitoring Parallel and Concurrent Programs
并行与并发程序监测中的时钟系统设计 - The Application of PLL in the Design of Processor's Clock System
锁相环在处理器时钟设计中的应用 - Frequency accuracy measurement is the basis of frequency disciplined in GPS disciplined Rb clock system.
在GPS可驯铷钟系统中，校频是驯频的前提。 - An Alarm Clock System Based on OOP
一个基于面向对象的程序设计方法的钟表系统 - An advanced and reliable world time clock system controlled by microcomputer was discussed and the PL/ M programming language-an advanced language which was used to develop single chip microcomputer was used.
本文论述了一种先进可靠的世界时钟微电脑控制系统，并且使用了一种先进的单片机开发语言&PL/M语言。 - The clock system is usually made up of clock distribution network and phase lock loop ( PLL).
时钟系统由时钟源（一般是锁相环）和时钟分布网络组成。 - The Design of a Phase-Locked Loop Used in a DSP Clock System
一种用于DSP时钟系统的锁相环的设计 - Real Time Clock System Design Based on SPI
基于SPI的实时时钟系统设计 - In this clock system power, 90% is consumed by the flip-flops themselves.
而其中触发器所消耗的功耗有占时钟网络功耗的90%。 - In the design of VLSI, the clock system design becomes an important topic in today's research.
在大规模集成电路的设计中，时钟系统设计已成为研究热点和难点。 - In this paper, the research and design of a phase-locked loop utilized in DSP clock system are described in detail.
本文详细介绍了一个用于DSP时钟系统的锁相环IP核的研究与设计。 - Study of biological clock system in mammals
哺乳动物的生物钟系统研究 - And the paper designed a power on circuit for clock system, which enhanced the chip's reliability.
为了提高芯片工作的可靠性，本文设计了上电初始化时钟电路； - The application of EDA technology is a trend in electronic design. This paper expounds the internal structure, the software and hardware tools and hardware verified results about clock system on a chip based on EDA technology, and summarizes merits of EDA based design.
阐述了EDA的工程设计流程，介绍了基于EDA技术的闹钟系统设计的内部原理结构图及硬件验证结果，总结了利用EDA技术进行电子设计的特点。 - Development of TQ-16 Computer Clock System
TQ-16计算机时钟系统的研制 - Research on the Clock System of Digital Communication Special Network for Hubei Electric Power System
湖北电力数字通信专网时钟系统研究 - Research and Design of the Clock System on Chip
片上时钟系统的研究与设计 - Design of Synchronization Technology for Asynchronous Multi-clock System
异步多时钟系统的同步设计技术 - Design and Simulation of Electronics Clock System Based on Single Chip Microcontroller
单片机电子时钟系统的设计与仿真 - As technology scales down, the design of System-on-Chip encounters some difficult problems: the communication ability can not satisfy the need of system, the overall synchronous clock system is difficult to design. That restricts more IP-cores could be integrated on a sigle chip.
随着集成电路制造工艺技术的进步，片上系统SoC在设计过程中遇到了通信能力难以满足系统需求、全局时钟难以同步等问题，制约了集成在单一芯片上IP核的规模和数量。 - The clock system includes clock distribution network and flip-flops, and 90% of its power is consumed by the flip-flops and the last branches of the clock distribution network that drives the flip-flops.
由时钟分配网络和触发器组成的时钟系统中，90%的功耗又是由触发器和直接驱动触发器的时钟分配网络末端所消耗的。 - System hardware design is as follows: the design of memory module, JTAG interface design, the clock system design, power module design, reset circuit design, video input and output module design, alarm circuit design and so on.
系统的硬件设计主要包括：存储器模块的设计、JTAG接口的设计、时钟系统的设计、电源模块的设计、复位系统的设计、视频输入输出模块的设计、报警电路的设计等。 - The research paper by the expansion of GPS synchronized time clock system includes GPS receiver module, GPS antenna and the core control system.
本论文所研究的GPS标准时钟系统主要包括GPS接收机模块，GPS天线以及核心控制系统。 - According to the system requirement, radar IF signal processing hardware system schematic is designed using Cadence electronic design automation ( EDA) software, which includes analog-digital conversion circuitry, memory expansion, power management, clock system, peripheral interface, et al. 4.
根据系统技术指标，搭建雷达中频信号处理硬件系统，主要包括模数转换电路、存储器扩展、电源管理、时钟系统、外围接口设计等。应用cadence软件进行原理图设计。